Design and Optimization of Speed and Power in FinFET Based Binary and Ternary CAM Cells and 4x4 CAM Arrays Using MTCMOS and GDI Techniques

Authors

  • N. Praveena Department of Electronics and Communication Engineering, Rashtreeya Vidyalaya College of Engineering, Bengaluru-560059 (working at Electronics and Communication Engineering, Sir M. Visvesvaraya Institute of Technology, Bengaluru), Affiliated to Visvesvaraya Technological University, Belagavi, Karnataka, India
  • N. Shylashree Department of Electronics and Communication Engineering, Rashtreeya Vidyalaya College of Engineering, Bengaluru—560059, Karnataka, India
Volume: 15 | Issue: 5 | Pages: 27188-27193 | October 2025 | https://doi.org/10.48084/etasr.11346

Received: 7 April 2025 | Revised: 10 June 2025 | Accepted: 21 June 2025 | Online: 29 September 2025


Corresponding author: N. Shylashree

Abstract

Content Addressable Memories (CAMs) are primarily used in routers and packet forwarding. The biggest problems in CAM design are the parallel comparison of Match Lines (MLs), latency, and power usage. This paper discusses the following techniques for reducing the latency and power: a binary 4T CAM cell, a 4x4 CAM array, novel 8T and 4T TCAM cells, a 4x4 TCAM array, Multi-Threshold CMOS (MTCMOS), and Gate Diffusion Input (GDI). The proposed binary MTCMOS CAM cell reduces the power dissipation by 31% and the delay by 11%, while the GDI CAM cell reduces the delay by 94.4%. The power consumed by the 8T-TCAM cell in the proposed TCAM designs is 754.5 nW, and the delay is 1015.4 ps. The 4T-TCAM cell reduces the power consumption by 37.65% and the delay by 18% compared to the 8T-TCAM cell. To further reduce the power and delay, the MTCMOS technique was applied to the 4T-TCAM cell. This resulted in a 32.5% reduction in power and a 13.09% reduction in delay, using Cadence 18nm FinFETs.

Keywords:

FinFET, Multi-threshold CMOS (MTCMOS), Gate Diffusion Input (GDI), ternary inverter, Content Addressable Memory (CAM), Ternary CAM (TCAM)

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How to Cite

[1]
N. Praveena and N. Shylashree, “Design and Optimization of Speed and Power in FinFET Based Binary and Ternary CAM Cells and 4x4 CAM Arrays Using MTCMOS and GDI Techniques”, Eng. Technol. Appl. Sci. Res., vol. 15, no. 5, pp. 27188–27193, Oct. 2025.

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