HORRIGUE, Layla et al. Efficient Hardware Accelerator and Implementation of JPEG 2000 MQ Decoder Architecture. Engineering, Technology & Applied Science Research, Greece, v. 14, n. 2, p. 13463–13469, 2024. DOI: 10.48084/etasr.7065. Disponível em: https://www.etasr.com/index.php/ETASR/article/view/7065. Acesso em: 3 jun. 2026.